Power Supply Control: Input capacitor considerations

The input capacitor performs two main operating functions for a boot-strapped converter. First, it is the power source during the soft-start process. During this process, it is the source of current for the converter’s gate drives. It also provides power for any other circuitry connected to the integrated circuit (IC) at the softstart.



Second, it is filtering the noise injected from the converter circuit or other circuitry. When the converter is running, the control IC’s input capacitor provides high current pulses to the gates of the field effect transistors (FET) and prevents these large current transients from creating noise “spikes” on the IC’s input.



These two functions require different features that are often incompatible in a single capacitor.



The capacitor must be sized to provide the bulk energy associated with the system’s energy during the soft-start function. This requires a large bulk storage-type device. These devices, depending on their size and type, often do not have the required low impedance characteristics at higher frequencies. HIGH-FREQUENCY CURRENTS

High-frequency gate drive currents needed for switching FETs require a capacitor to handle highfrequency currents. A multi-layer ceramic capacitor has the required characteristics. Because of the high frequency requirements of the system, electrically, this capacitor must be located in proximity to the IC with minimum inductance between the two.



When determining the bulk capacitor’s size, it is important also to realize that the IC needs its own internal power. This is because once the IC reaches its turn “on” voltage, all the IC’s internal circuits are powered and start drawing current. These circuits include the oscillator which provides the timing for the switches, error amplifiers and comparators used for control and reference. Until this point, these parts have not been powered. That’s why two capacitors are often recommended.



One of these capacitors can be relatively small with low equivalent series resistance (ESR) and equivalent series inductance (ESL), and placed immediately between the IC’s power pin (Vcc) and its ground. This capacitor is designed to handle high-frequency currents associated with internal and external load switching such as the gate drive to the power FETs.



The second bulk capacitor should be located as near to the Vcc and ground as is practical. However, since it is not handling the same high-frequency current components, its position is not as critical. It provides the bulk energy necessary for the duration of the startup sequence.



Examining the converter’s start-up sequence helps identify some potential problems. First, we will assume that only a small highfrequency capacitor is needed. Then by using only one smaller capacitor, the results will emphasize the reasons for using an additional bulk capacitor.



For our analysis, we will assume that we are driving a single FET that requires 60 nanocoloumbs of gate charge every time it is switched “on” and the operating frequency is 100- kHz. This translates into a 6mA current for the gate drive alone, once the circuit is powered. This is determined by the following equation:



60 nanocoloumbs X 100kHz = 6- mA



If a 10ms soft-start total time is assumed, then the FET drive current plus the IC’s internal current of 6mA (for a total of 12- ma) is used to determine the volt drop. The UCC2817 has a minimum 5.8V hysterisis. Will a 0.1uF Vcc capacitor be enough to power the IC through the soft-start function? (If the minimum hysterisis is not given, use the lowest turn “on” voltage and the highest turn “off” voltage to determine this from the under voltage lock out (UVLO) data.)



The answer to the question is “No,” it will not have enough capacitance. The 0.1uF capacitor’s voltage with a 12mA current for 10ms will change by 1,200V. Even a 10uF capacitor will vary by 12V. In this case, a 100uF cap would be desirable, leading to a Vcc 1.2V drop. We now know that a 100uF capacitor is required for the bulk capacitance of the IC and FET to handle the power consumption during the start-up sequence.



RIPPLE VOLTAGE

However, if one high-frequency switching cycle is studied, what will be the voltage “ripple” on a 0.1uF capacitor? Because 100uF capacitors usually have very poor high-frequency characteristics (ESR and ESL) we will ignore the bulk capacitor. The ripple voltage would be found at the Vcc pin with respect to the ground pin. The ripple voltage from the FET switching can be determined from the following equation:



[(60 nanocoloumbs/0.1uF) = 0.6 volts].



There will be a 0.6V negative “spike” as the gate is charged. That spike occurs unless there is another high-frequency capacitor nearby, or a higher-value capacitor is the high-frequency filter. In this case, a 1uF capacitor may be a better choice.



Admittedly, this may seem like an extreme case, but for a PFC controller like the UCC2817 this is a realistic condition. This, of course, leads to charge time questions of the 100uF capacitor (but those will not be dealt with here).



For other circuits, the soft-start can be much shorter in duration, 500 microseconds for example, and the internal power consumption can be lower. With the UCC28C42, the minimum turn “on” and maximum turn “off” voltages are 13.5 and 10.0V, respectively. The maximum IC current consumption is 3.0mA. If only half the total gate charge is assumed as compared to the previous example, and an input capacitor is a 0.1uF capacitor, the voltage drops 30V. In this case, a 1.0uF capacitor results in a 3V drop. That seems to be acceptable, and all would appear well – but there are still a few other things to consider.



At start-up, the voltage on this 1.0uF capacitor is 13.5V. The first thing that happens when the capacitor reaches this voltage is the capacitor on the reference voltage pin is brought up to 5V. If the total capacitance on the reference is 0.1uF, the charge transfer results in a further 0.5V drop. So, it seems that the unit will “marginally” have enough energy to start properly. If the 1.0uF cap tolerance is on the low side, then the unit may not start correctly.



Sometimes designers use the voltage reference (VREF) to power other loads. For instance, the VREF of the UCC28C42 maintains its regulation for up to 20mA. If that kind of a load is placed on the VREF pin, then the input capacitor must be sized to handle the additional current during the soft-start because it is ultimately drawn from the VDD (input power pin of the IC) capacitor. A VDD capacitor of 4.7- uF would be required to limit the input voltage drop to about 2.6V and ensure a safe start. Again, if the 4.7uF capacitor has a +/-20 percent tolerance, there will be instances where the units will not necessarily start because at -20 percent tolerance of the total voltage drop is over 3.5V.



CONCLUSION

Several steps are necessary before selecting the input capacitor for a power control IC. First, identify how much bulk energy is required until the converter is brought up to full-voltage and capable of supplying current to the IC from the “boot-strap winding.” Next, find out what instantaneous “ripple” is caused by the loads on the capacitor.



Additionally, energy considerations must be evaluated. These include the capacitor’s total load from the IC including VREF and other Vcc line loads, the drive requirements and the IC’s running current. The charge required to bring the VREF capacitor “up” to voltage also needs to be considered since it will also be drawn from the Vcc capacitor.



The next step is to determine the IC’s minimum turn “on” and maximum turn “off” voltages, also known as the UVLO thresholds or minimum hysterisis voltages.



Finally, identify the maximum time it will take from initiation of the start-up until complete start-up is achieved. Also remember to factor in the capacitor’s tolerance.



These three steps determine what minimum bulk capacitor is needed. The high-frequency capacitor selection is an analysis of the high-frequency currents that the small capacitor across the IC must supply and the voltage “ripple” resulting from the current pulses being drawn by the load, or FET gates.



When all of these are taken into account, it should result in the safe and reliable design of IC input capacitor requirements used in a boot-strapped power converter.