ECN Asia met David Greenfield, senior director of product marketing, high-density FPGA products, Altera Corp., on the sidelines of SOPC World, Bangalore, and talked about the latest issues confrontingprogrammable logic. Excerpts: How important is it for Altera to be the first to come out with a product at the latest node to be at the leading edge of technology? Technology leadership does not mean being the first to come out with a product at a new node, but to be able to start volume production at the latest node at the appropriate time. The customer will get the benefit of products at a new node only after the infrastructure has been built up and the process has been validated. We are in the race for technology leadership in volume production, and not in the race for reaching a node first just for the sake of reaching there. This allows us to better manage risks, and lower the risk to the customer. Altera has the best industry record of reliably delivering the benefits of new semiconductor process technology to its customers What should the designer expect from Stratix III and Quartus II Software V6.1 that he has not been able to get hitherto? Stratix III FPGA family delivers the industry’s lowest power consumption of any high-density, high-performance programmable logic devices. Built on TSMC’s 65nm process, it gives 25 percent higher performance and twice the density compared to Stratix II devices. The Quartus II Software V6.1 gives designers higher performance and productivity. Its power optimization tool was designed in concert with Programmable Power Technology in Stratix III, enabling 50 percent power consumption saving compared to Stratix II. This software has an average of 55 percent faster compile times for Stratix III FPGAs compared to competing 65nm products in the market. Can you name some applications that are migrating from ASICs to FPGAs? Handheld type devices in the past were almost always using ASICs. These are now moving toward programmable logic. Fish-finders, toys, and mobiles are some such devices. How is the rising use of IPs affecting FPGA designs? IPs make technology adoption much faster. Reusing IPs across different products and teams provides flexibility, scalability, and reusability. The increased competition today makes most m a r k e t s much like the consumer market, with time in market shrinking, and consequently time to market also shrinking. This dramatic change in product life cycle has drastically reduced the product development time. Using IPs is one of the techniques for cutting down product development time. What kind of help does Altera offer the designer to ensure that the IP meets the requirements of platformbased FPGA design? Mixing and matching IP blocks is one of the big changes that has come about in design methodology. Altera has a library of IPs to offer the customer. Besides, Altera can also offer third-party IPs, or help the customer develop his own IP internally. We can have a partnership program with IP companies so that the customer is able to get the best value for his money. |
