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Voltage mode, current mode or something totally different?
( 01 Jun 2007 )
by Frederik Dostal, National Semiconductor
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There are many different switching regulators and controllers on the market for DC to DC step down power conversion with many different control loop architectures, each offering advantages and disadvantages for a given power supply. An engineer not ‘living’ power management every day might select a power management IC for a project without clearly understanding the advantages and disadvantages of different control topologies. In a later step in the design, the actualities become transparent; but at this point in time, changing the power management IC might interfere with a tight schedule.
There are three main groups of control topologies in DC to DC conversion: Voltage mode control, current mode control and hysteric mode control. Figure 1 gives an overview.
VOLTAGE MODE CONTROL
Voltage mode control has been around for a long time. The control loop is set up so that the output voltage is compared to a reference voltage by an error amplifier. The output of the error amplifier equals the error – in other words, the amount the feedback voltage is away from the reference voltage. This error voltage is then compared to a wheeling saw-tooth voltage, and a comparator (PWM comparator) sets the duty cycle for the power switch.
The advantages of this topology are that the control loop can be made relatively fast, and there is no minimum on time required. Some voltage mode ICs do require some minimum on-time, but it is very short.
Keeping the advantages in mind, voltage mode is used in fast applications such as powering high-end computer processors and also in applications where the input voltage will be close to the output voltage. The short minimum on-time helps to achieve low dropout voltage (possible difference from input voltage to output voltage), especially at higher switching frequencies.
CURRENT MODE CONTROL
Current mode control converters became popular after voltage mode converters had been in use for a long time. Here, the control loop is set up so that the output voltage of the error amplifier is not compared to a wheeling saw-tooth waveform, but to a ramp signal which represents the inductor current. There are different possible positions in which the current can be measured such as those indicated in Figure 2. It shows the position A for peak current mode control and position B for valley current mode control. The current can either be measured with a dedicated sense resistor, or by measuring the voltage drop across one of the switching transistors. Sensing the current by measuring the voltage drop across the transistors is less expensive and more efficient. However, dedicated resistors are more accurate.
When current mode control was first used, an occurrence known today as sub-harmonic oscillation was discovered. It causes the switch pulse to toggle between a long and short pulse. This can only happen with duty cycles greater than 50 percent. Designs that require a duty cycle larger than 50 percent can be fixed by adding slope compensation. This adds a bit of a saw tooth waveform to the sensed current information. The more slope compensations used, the more the behavior of the current mode control will be like a voltage mode control. With excessive slope compensation, most of the current information is lost and the converter acts like a voltage mode converter.
Among the advantages of current mode control is the inherent current limit capability since the current is constantly monitored anyway. In addition, this form of control offers higher simplicity in compensating the control loop.
One of the disadvantages of this topology is the blanking time required to sense the current. Right after the power transistor switches, there is always noise that settles after some time. This noise could severely influence the sensitive current measurement and cause cycles to prematurely terminate. A fixed blanking time is put right after each start of a cycle where current is not measured. This fixed blanking time limits the difference between input to output voltage, especially at higher switching frequencies.
There is a new type of current mode control that National Semiconductor is using in the new generation of simple switchers that is called emulated current mode control. The current ramp is not actually the current through the inductor, but it is an assumption of what the current during a cycle will look like by evaluating the previous off-time. This concept makes very small duty cycles possible even at high switching frequencies when using current mode control converters.
HYSTERIC MODE CONTROL
The third method of control is hysteric mode control, also called bang-bang control. It is the only topology that does not employ an error amplifier, but it uses a comparator instead. The output voltage is controlled within a hysteric window. If the voltage is too small, the power transistor is turned on; if the output is large enough, the power transistor is turned off again. Such a control is very simple to build since no oscillator is needed, and the regulation is very fast. Reaction to load and line transients only depends on propagation delay and not on the oscillator to start a new cycle. This makes the control type popular with driving dimmable current sources such as drivers for LEDs.
This control type does not need loop compensation. It makes design easy, and it avoids problems of instability. On the other hand, the control architecture behaves a little bit unpredictably when it comes to the switching frequency. Since no oscillator is present, many factors that might change in a finished design influence the switching frequency. Frequency variation due to the input voltage changing can be minimized with input voltage feed forward. The on-time of a switching cycle is made inversely proportional to the input voltage.
Previous hysteric control devices required some output voltage ripple so that the comparator hysteresis is functioning properly. The newest advancement in hysteric control is a method of injecting some low side current sense signal into the regulation comparator so that there is no output voltage ripple necessary for this control type. Power converters with good ceramic output capacitors will run well with very little output voltage ripple.
The table in Figure 3 shows the advantages and disadvantages of the different control loop architectures summarized here. Depending on an individual design task, the best suited control architecture can be selected. Besides the control architecture, other important features of a power management IC have to be considered as well. However, they are usually more obvious than the control type.
Frederik Dostal is an applications engineer for power management, National Semiconductor Corp., 2900 Semiconductor Dr., Santa Clara, CA 05052; (408) 721-5000; www.national.com. He can be reached at Frederik.Dostal@nsc.com.
Illustrations:
Figure 1
Figure 2
Figure 3
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