The VSC3406 6.375Gbps multi-rate backplane transceiver from Vitesse Semiconductor Corp. incorporates the latest clock-data recovery (CDR) techniques and signal integrity toolset for backplane and interconnect design. It features the VScope waveform viewing technology that embeds an oscilloscope function into the receiver of input CDR circuits. This comprehensive signal integrity solution gives engineers a single device that enables both a high-speed transceiver function and verification mechanism.
According to Aileen Arcilla, senior analyst -semiconductors: networking, broadband and storage for International Data Corp. (IDC), embedded oscilloscope functionality can potentially lower network testing and maintenance costs, an ongoing concern for anyone who manages a network. Providing the means of remote diagnostic capability can offer telecom carriers and data center managers a more direct way to verify signal integrity within the data path itself and take corrective action in a timelier manner.
As the most complete 6Gbps backplane signal integrity solution available to date, the 6.375Gbps multi-rate, multi-function backplane transceiver has six high-speed differential transmit and receive interfaces, complete with on-chip termination ideal for interfacing to a variety of media such as PCB traces, cables or optoelectronic devices connected to optical fiber.
It features a two-to-one rate multiplier mode that allows data "multiplication" up to 6.375Gbps, doubling bandwidth over existing backplanes. A typical application includes XAUI rate-doubling for efficient transmission in high-speed backplanes over half the number of wires. Coupled with the signal equalization function, these rate multiplier modes can be used to run double and quadruple the amount of bandwidth over existing copper traces. This gives OEMs the ability to field-upgrade equipment to handle greater bandwidth by upgrading line cards and switch cards in existing equipment.
With a single reference clock input, the VSC3406 achieves highly advanced operations at any data rate between 0.125Gbps and 6.375Gbps. The multi-rate CDR of the transceiver makes it ideally suited for next-generation backplanes and communication equipment running a variety of protocols, including Gigabit Ethernet, XAUI, Fibre Channel, Serial Attached SCSI (SAS), Serial ATA (SATA) and PCI Express (PCIe).
A fully non-blocking, multicast architecture allows the transceiver to be user-configured via a simple, two-wire serial interface for a broad range of signal conditioner, re-timer, crossbar, or rate multiplication applications. A high degree of signal integrity is achieved by means of configurable input and output equalization. Cost-effectiveness is realized because engineers can use one product across multiple applications and platforms allowing for maximum re-use and research and development savings. |