Easy-to-use power management solution keeps system cost low

With higher integration, faster processor operating needs, and lower price targets, point-of load (POL) processor power designs for digital televisions, cable modems and set-top boxes (STBs) have become more challenging. To address this issue, a new dual-channel, step-down DC/DC converter from Texas Instruments was developed using advancements in process technology for power management devices that keeps system cost low. With this in hand, only basic power supply design knowledge is needed to design a high-performance power supply, allowing designers to focus on making their consumer electronics project successful, cost-effective and robust.

Typical power architecture for POL consumer apps

Non-portable consumer electronics devices are powered from different types of AC/DC power supplies. For instance, cable modems are powered from a simple wall adapter, while LCD-TVs integrate within its chassis a more complex power supply capable of providing hundreds of watts with power factor correction (PFC). Inside each of these AC/DC power supplies, the AC power is converted down to common DC voltages, such as 5V, 12V or 24V – depending on the highest DC voltage needed in the system with a significant load current. Such loads can be line drivers, cold cathode fluorescent lamps (CCFLs), backlight inverters or tuner modules.

Considering a dual output power solution

Integrating two power supplies onto one piece of silicon, and encapsulating it in a small package with low pin-count, brings many advantages in consumer applications. Most consumer applications require multiple low-voltage rails to support logic circuits. In these applications, dual converters can combine individual controllers and MOSFETs of two converters into one compact device. Many ASICs and processors require both core and I/O voltages, which may also have sequencing requirements, whereas a dual output DC/DC converter could integrate circuitry for easy implementation of output voltage sequencing requirements.

Reducing the number of DC/DC converter ICs saves cost in many ways. Sample savings include reduced time-to-market, ease of design, reduced procurement constraints, and increased reliability since fewer components are soldered to the circuit board.

The technology to make dual-channel, high-current DC/DC converter possible has several design tradeoffs – keeping the power dissipation in the device low is a challenge since two converters are in one package. Integration of low resistance MOSFETs is critical to achieve small circuit area, but the thermal requirements of the converter’s packaging also must be taken account. Unfortunately, lowering the power MOSFET on-resistance means increasing the silicon die area, which increases the size and cost of the IC. This dilemma is always faced by DC/DC converter manufacturers – decrease the MOSFET size to fit the IC in a small package or increase the MOSFET size to decrease the power dissipation and improve efficiency.

With state-of-the-art process technology, the TPS54386 achieves an optimal balance of size versus efficiency with an on-resistance of 85 milliohm for each MOSFET in a small 14-pin HTSSOP package. For the consumer electronics designer, it is a good idea to compare the on-resistance of competing wide input voltage DC/DC converters and measure the efficiency to make sure the best value is obtained.

Despite the advantages of using a dual converter, the market for similar single-channel DC/DC converters still remains. When the intended load of two low-voltage outputs are separated by large distance, using two single channel controllers may offer a better solution than one dual converter. At high currents, the resistance from the PWB trace lowers the output voltage at the load. This affects the power supply’s voltage regulation accuracy as well as power dissipation. Careful circuit board planning before layout helps determine whether the better choice is using one dual converter or two single converters.

Integrating sequencing schemes

Implementing power supply sequencing is a good design practice. More processor manufacturers are providing recommending timing guidelines for processor core and I/O power-up sequencing. Aside meeting core and I/O power-up timing requirements, sequencing power supplies also can help reduce inrush currents during startup.

When several power rails start up simultaneously, more demand is placed on the primary power supply. If the current draw coupled with charging bulk and bypass capacitors is too large, the primary power supply may trip its current limit set point, thereby causing it to shut down. Staggering the power rails helps to minimize inrush current related problems. To solve these problems, the dual converter provides separate enable pins to accommodate a specific start up sequence. An R-C circuit connected to enable pin may be used to delay the turn-on of the associated output after power is applied to the power input pin.

In addition, the sequencing pin allows the user to select either sequential or ratio-metric sequencing. For ratio-metric sequencing, each output ramps up at a rate determined by the final output voltages, while entering regulation at the same time. With sequential sequencing, one output begins to start up after the output reaches regulation. The user can program which of the two output ramps up first with the SEQ pin. Moreover, the enable pins allow for independent converter operation, if desired.

Reducing external component size and quantity

Recently, the technique of switching two output voltages out-of-phase has gained popularity. Two separate voltage regulators operating in a system can share an input capacitor and draw ripple current twice the frequency of a single unit. When operating the two voltage regulators at 180º out-of-phase, the total RMS input current is reduced, decreasing the amount of input capacitance required. In this case, the oscillator frequency is internally fixed at twice the switching frequency. The two outputs are internally configured to operate on alternating switch cycles. This technique reduces the amount of bulk capacitance, thereby, lowering system costs. In addition, synchronization reduces EMI by eliminating beat frequencies between the two converters.

DC/DC converters are available that implement either internal or external compensation in the feedback network. External compensation provides a wide selection of inductor and capacitor combinations, but control loop compensation and stability criterion can be cumbersome for some digital designers who often are not experts in analog design. In this approach, the LC filter is selected first, and the compensation is determined afterwards. Internal compensation simplifies the design and reduces the number of external components, but bounds the designer to certain LC component selections. In this case, the LC filter must be appropriately selected to maintain stability. To reduce design and production costs, the converter integrates the compensation components. This reduces the total parts count, while providing some flexibility when choosing the inductor and output capacitor values.

Using high-resistance aluminum or low-resistance ceramic output bulk capacitors

Popular in consumer electronics due to their low cost, aluminum electrolytic capacitors have a relatively high equivalent series resistance (ESR) which varies widely over temperature, but offers large amounts of capacitance. To reduce the total ESR, several aluminum electrolytic capacitors must be placed in parallel, which takes up space.

Alternatively, a relatively small ceramic capacitor can be placed in parallel with the aluminum capacitor to reduce the ripple voltage. Either way, the power stage must be appropriately compensated. With internally compensated parts, if a high ESR capacitor is used in output filter, a zero is introduced into the loop response, which could lead to loop instability. To cancel this zero, a pole with a small single ceramic capacitor placed in parallel with the lower voltage resistor should be used.

Recent developments in ceramic capacitor technologies have increased the capacitance values and lowered cost. Low ESR ceramic capacitors are being used at higher switching frequencies and are an attractive alternative to aluminum electrolytic capacitors. When using low ESR ceramic capacitors with this internally compensated device, a zero needs to be added in the feedback network to reduce the slop of the gain at the crossover frequency and provide a phase boot. This zero is added by placing a small capacitor in parallel with the uppwer voltage resistor divider.

Conclusion

Integration in power electronics allows digital designers to focus on their key talents and leave more of the design burden to the power IC vendor. Cost targets in consumer electronics applications are aggressive and additional power management features can help reduce the overall system cost. DC/DC converter suppliers have included features to reduce cost and complexity by combining multiple converters on one chip, integrating sequencing schemes, and allowing low cost filter components that minimize placement costs.