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Configurable SoC platform for Bluetooth applications
( 01 Jun 2008 )
by Sharmila Saha, Technology Evangelist, R&D Services, MindTree
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Configurable SoC platform-based approach provides maximum flexibility, as well as time-to-market advantage for system architects to design custom SoCs. In this article, we take a look at the advantages of a configurable SoC platform over a conventional hardwired logic and describe MindTree’s configurable SoC platform for Bluetooth and ultra low power (ULP) Bluetooth applications.
Bluetooth is a short range wireless communication technology operating in the unlicensed 2.4GHz ISM. Typical cable-replacement applications of Bluetooth include handsets, headsets, hands-free units, HIDs (mouse, keyboards, and remote controls), laptops, printers, etc. The ULP Bluetooth technology is for small, button cell battery-powered devices like watches, wireless keyboards, gaming sensors, and medical equipment. These market segments demand an extremely low cost and low power approach for implementing standalone Bluetooth functionality in the products.A STEP AHEAD
Traditional methods of Bluetooth enabling a product like external adapter, module, or a two-chip solution using prequalified Bluetooth chipsets will not work – a custom SoC is the right choice for these types of applications. SoC developers usually implement time-critical tasks using hardware methods to improve performance or power efficiency. This is preferred over software code running on a processor, even though the software code offers more flexibility. The challenges of rapid design through verification and fast response to changing requirements are the primary concerns of many SoC developers when implementing any new hardware.
To implement a reusable SoC architecture, basic IP blocks like memory controller, power management controller, interrupt controller, internal memories and bridges are required. All these components are customized to meet the application-specific SoC requirements. Such blocks have significant impact on the performance of the SoC.
Typically for each SoC design, basic IP blocks are designed groundsup or existing working blocks are modified. Developing these blocks take up engineering resources and time that can be avoided. Configurable IP offers a solution to the problem by allowing the designer to configure certain parameters through a script/GUI and “generate” the block as per requirements. If the requirements change, the block can be reconfigured again. Maintainability is greatly improved by using configurable IP blocks, although developing the configurable IP block the first time may take a little more effort than a traditional IP block.
A configurable SoC platform goes one step further – it combines the advantage of a flexible SoC platform with configurable IPs for a specific set of applications. In this kind of design, a major part of the SoC ASIC can pre-exist in a basic form and can then be customized for the application. The SoC designers can easily lower gate count, power consumption or any other feature by configuring, customizing, extending, and most importantly testing the SoC in a software environment that resides on a user’s desktop.
AlphaBlue is a configurable Bluetooth SoC platform with a bouquet of SoC IP infrastructure, verification environment, validation platform, and automation framework. This platform provides maximum engineering flexibility to achieve optimized area, power and memory footprint for a Bluetooth application, thus providing a low-cost solution. The platform is optimized for Bluetooth and ULP Bluetooth applications.
The AlphaBlue SoC platform is composed of the following elements:
• Bus architecture: The platform supports AMBA bus architecture. The AMBA AHB is supported for high-performance system modules like Bluetooth IP, which are required to run the core software engine. The AMBA APB is for engine. The AMBA APB is for low-performance peripheral modules used mostly by the applications. The platform can be configured to support one AHB master and up to four AHB slaves and up to 12 APB slaves.
• Memory architecture: The platform supports different kinds of subsystems like closely (tightly) coupled memories, on-chip memories, external memory, or a combination of these. The platform supports configurable IPs like on-chip memory controller, external memory controller, and patch system to ease realization of diverse memory subsystems.
• Power management: The platform supports a centralized system controller which provides the power management framework for the SoC. The peripheral IPs also provide individual power management framework at an IP level. The software can use the power management framework to achieve optimal power consumption. The system controller employs power management techniques like dynamic clock gating, dynamic clock switching, dynamic frequency scaling, and external oscillator/crystal controls.
• IP portfolio: The platform supports a long list of configurable IPs like Bluetooth baseband controller, GPIO, timer/watch dog timer, interrupt controller, memory controller, UART, SPI, I2C, etc. The IPs can be easily customized, configured, and used in a mix-and-match mode – depending on the application requirements.
• Hardware software co-verification: The hardware software co-verification is a C-based environment used for the verification of the application drivers, peripheral IPs, and SoC aided by MindTree’s verification platform interface (VPI) and test re-use (TRM) methodologies. The VPI methodology provides the necessary verification stubs in the environment for effective test bench control and logging. The TRM methodology encourages the use of common drivers for test cases and application development and common test cases for verification and validation of peripherals.
• Validation platform: The validation platform is a compact application development and prototyping platform which allows users to develop, validate and qualify Bluetooth solutions for diverse applications. The platform allows users to integrate and validate new peripherals and associated drivers, develop SoC and application software, and perform the system-level validation before targeting for an ASIC. The platform based on Xilinx Virtex II Pro FPGA family can be both battery (rechargeable) and adaptor operated. Bluetooth applications which have been validated using this platform are hands-free and remote control applications.
• Automation framework: Finally, the automation framework ties all the pieces together and provides a unified user-friendly environment for the designers and developers. The automation framework enables variant SoC architecture evaluation at ease and integrates various stages in the system design flow, thus improving productivity.
REDUCE INTEGRATION TIME AND EFFORT
An industry qualified IP for Blueooth alone is not sufficient, optimal design for the product is equally important. By using the AlphaBlue configurable SoC platform, MindTree was able to reduce the integration time and effort for Bluetooth SoCs.
The platform enabled significant reduction in gate count and power consumption. The approach also significantly reduced re-engineering efforts for developing variant SoCs for diverse applications.Click here for the illustration:
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