Xilinx completes 65nm Virtex-5 FPGA Family with FXT Series

In an interview with ECN Asia, Xiaoming Liang, Advanced Products Marketing Manager, Xilinx Asia Pacific, discusses in detail the company’s newly released Virtex-5 FXT FPGAs, as well as provides his insight into the trends and challenges happening in the FPGA industry. Excerpts:



What separates Virtex-5 FXT from other FPGAs in the market?

This device has a lot of powerful features: the PowerPC, the advanced DSP, and the higher performance serial I/O, called the Gigabit Transceivers [GTX], which can support data rates from 500Mbps to 6.5Gbps.



Virtex-5 FXT has an innovative processor block architecture. It integrates two IBM PowerPC 440 processor cores, which deliver 1,100DMIPS at 550MHz; an advanced processor block architecture with 128-bit connectivity crossbar switch; and an enhanced APU controller. These features enable the device to deliver more than five times throughput improvement. Also, Virtex-5 FXT has up to 384 built-in 18x25 XtremeDSP slices delivering up to 192 GMACs, and it has 16.5Mb of memory. Overall, Virtex-5 FXT is the ultimate system integration platform. It provides greater integration to reduce system costs and power, and greater flexibility to deliver easier system design.



What will be the dominant end application segments for the new Virtex-5 family?

Virtex-5 FXT can be used in wired and wireless communications, audio-video broadcast, military and aerospace, as well as the ISM [industrial, scientific and medical] segments. But out of the four areas, the communications segment — both wired and wireless — is where we get the maximum usage.



What functionalities does Virtex-5 FXT provide on those specific segments?

Serial high-speed I/O is one. Some of the boxes can run up to 40Gbps, so for us they will probably use one or two chips to complete their design, maybe the biggest chip which has 24 channels. The PowerPC will be used to do the traffic controls at the backplane side. For the wireless segment, the DSP side will handle the digital uplink and the downlink conversion. Virtex-5 FXT is actually a chip designed with all those applications in mind, especially in the communications segment.



Do customer requirements/feedbacks affect your designing these types of products?

Absolutely! Before we go to defining the specs of the next-generation of our products, we do a series of customers’ engagements, understanding their future needs maybe two to three years down the road. We gather those inputs, and then we put that into a list and develop specs against those requirements. It is done two to three years ahead.



What design strategies did you employ to enhance what is so-called “key features” of Virtex-5 FXT?

Before, we used to design everything in our labs, and then we throw it to our foundry partners, such as UMC. But as the technology moved from 130nm to 90nm to 65nm, even to 45nm, that doesn’t work anymore. You have to collaborate with your foundry partners and involve them in your design from the first stage, so that when you design your products and they go to manufacturing, high yield and high reliability are ensured.



What were the challenges that Xilinx designers faced as they packed all these features into one small die?

As we go into smaller nodes from 90nm to 65nm, and eventually to 45nm, power has become a key problem. The other challenge was actually doing the characterizations – whatever we simulate in the computer should match the performance of the actual chip. As we go through process advancement, that matching gets more and more difficult.



Challenges in moving toward 45nm also includes improving transistor resolution and increasing transistor mobility, achieving smooth ramp and manufacturing flow, and optimizing performance and signal integrity. Thankfully our advantage is our success in the 65nm; we have applied what we have learned in the 65nm node as well as the 90nm into the 45nm node.



When are you likely to introduce 45nm FPGA chips?

We will introduce the product when the market is ready, that is, when the customers require it.



What are the upcoming developments from Xilinx in Asia?

The Asia-Pacific constitutes roughly about 25 percent of the total revenue of Xilinx. And we have been investing heavily in this region. We established our headquarters in Singapore in September of last year. We have development and application centers in China, and we have R&D centers here as well as in India. We will continue to beef up our R&D capabilities, especially in the 45nm segment. Moving forward, we will continue to increase the resources here. We will increase some of the marketing programs that we will be doing across Asia Pacific, and we will also enhance our Xilinx University programs, not only in China and India, but maybe expand in other countries as well.