Atmel Corp. announced its CAP7L customizable microcontroller that allows fabless semiconductor companies to implement ARM7 processor-based systems-on-chip (SoCs) with a turn-around period as low as 12 weeks, a nominal NRE charge of only $75,000, and unit costs as low as $5, without requiring a separate license from ARM.
CAP7L provides the lowest NRE available and are economical in volumes of 10K units, with a $17 fully-amortized unit cost. In 50k unit volumes, the amortized unit cost is only $7, including NRE and IP expense.
AT91CAP7L devices are standard product microcontrollers with up to 200K gates of metal programmable cell fabric that can be used to implement proprietary customer IP, hardware accelerators, additional processor cores or unique peripherals sets to achieve a customized SoC.
The attractive $75K NRE is made possible by Atmel’s second-generation metal programmable cell fabric technology, MPCF-II. The original MPCF technology, announced in 2007, achieves the silicon efficiency of cell-based ASICs with the lower cost and quicker turn-around of platform ASICs. The original recipe used contact, six metal, and five via layers for the MP Library cell configuration and interconnect. The new MPCF-II technology has a new VP (Via Programmable) cell library designed to configure and route the chip using only three metal and three via layers, thereby reducing the number of masks to modify from 12 to 6 and cutting NRE costs by 50 percent.
The metal programmable (MP) block comprises about 15 percent of the CAP7L die area. The remaining 85 percent of the die is pre-defined, consisting of an ARM7 processor with 4-layer AMBA AHB bus and 22 channel peripheral DMA controller, USB device, SPI master and slave, two USARTs, three 16-bit timer counters, an 8-channel/10-bit analog to digital converter, 160 Kbytes of SRAM, plus a full-functioned system controller including interrupt, power control and supervisory functions. To ensure adequate communication between the custom functionality in the MP block and the rest of the chip, the metal programmable (MP) block has two AMBA AHB masters and two AMBA AHB slaves, fourteen AMBA advanced peripheral bus (APB) slaves, and 32-bit programmable I/O that may be hardware selected to share I/O. An on-chip priority interrupt controller provides up to 13 encoded interrupts and two additional un-encoded interrupts for DMA transfers.
CAP7L enables a low cost solution for large OEM customers creating differentiated ARM processor-based systems designs and innovative fabless companies bringing new IP to the microcontroller market. MPCF II technology enables rich ARM7 processor-based designs in a cautious economy where NRE dollars are tight - perfect for stimulating growth in the reality of smaller design teams and limited engineering budgets.
The design flow for the CAP7L is the same as it would be for an FPGA-plus-MCU or ASIC implementation. The design is initially developed using an Altera or Xilinx FPGA and an ARM7 processor-based MCU. Atmel provides the CAP7E ARM7processor-based MCU with direct FPGA interface for this purpose. The interface on the CAP7E affords the FPGA direct access to the AMBA AHB and peripheral DMA controller on the CAP7L. Atmel also provides FPGA logic that decodes and encodes the bus traffic that flows between the FPGA and the CAP7E microcontroller. The logic blocks inside the FPGA are connected to the CAP7E via the AMBA AHB master and slave channels.
The CAP7E-plus-FPGA implementation can be used for early market testing and proof-of- concept, prior to migrating to the CAP7L.
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