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Issue > Nov 2009 > Features
 
 
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Performing equalization with your oscilloscope


( 01 Nov 2009 )

Robert Lashlee and Brig Asay, Agilent Technologies

Today’s high bandwidth serial busses continue to push high loss board material to its limits. This results in decoder errors at the receivers. Real time eyes are now closed, making it necessary to either design using more expensive materials or use techniques to prolong the life of current materials. Because of the cost of less lossy materials and traces, the latter is the preferred option.

Equalization is one such technique that allows for extending the product life cycle of FR4 and other older materials. Using equalization means designing equalizer chips at the receivers. Examples of technologies that currently use equalization include SATA and SAS 6G, FibreChannel, and PCIExpress Gen 2. Of course, any extra design effort, including designing an equalizer chip, affects the time-to-market for new chip development. Engineers are met with the challenge of accurately designing equalizer chips with minimum design times. Minimizing effort is part of the reason why real-time oscilloscopes are beginning to offer equalization software.

Oscilloscopes provide real-time updates of equalizer chips or, even more importantly, can use the data collected through its acquisition memory to design the most important part of the equalizer chip “tap values” for the user, thus saving many design cycles and allowing chips to get to market much faster.


INTRODUCTION TO EQUALIZATION



A serial signal consists of a transmitter sending a signal over a transmission channel (for example, backplane and cable) to a receiver. As the signal rate increases, the channel the signal travels through distorts the signal at the receiver. This can result in a partially or completely closed eye diagram where the clock/data cannot be extracted by the receiver. In order to recover a clock or data from the eye diagram, it must be re-opened. This is where equalization can help.

Look at Figure 1, you can see that an open, clean eye leaves the transmitter and is sent through the channel. As it passes through the channel, random noise, crosstalk, and inter-symbol interference (ISI) distort the signal, causing the eye to close. Equalization is then used to re-open the eye by correcting for the ISI.

ISI is caused by the non-flat frequency response of the channel (high frequencies exhibit more loss than low frequencies) and results in the distortion of pulse shapes in your signal. Equalization can be used to remove ISI because ISI is caused by a combination of the geometry of the circuit (the design of the trace) and the medium from which the circuit is composed (the conductor or dielectric) – all things that can be determined prior to transmission.

As you can see, the main purpose of equalization is to correct for the problems caused by the transmission channel. Equalization techniques provide a way to discern the original signal (the signal coming out of the transmitter) given a distorted signal at the receiver. In other words, equalization corrects for the high frequency component voltage levels and, in the process, corrects the trajectories of these components in the corresponding eye diagram (opens up the eye).

This article will discuss two types of equalization methods: feed-forward equalization (FFE) and decision feedback equalization (DFE).



FEED-FORWARD



FFE is an equalization technique that corrects the received waveform with information about the waveform itself and not information about the logical decisions made on the waveform. It basically acts like a FIR (finite impulse response) filter and uses the voltage levels of the received waveform associated with previous and current bits to correct the voltage level of the current bit. One key thing to remember when working with FFE is that the equalization is performed on the actual waveform. At no point in the FFE algorithm are logical decisions made (is this bit a 1 or a 0?). Instead, FFE is only concerned with correcting voltage levels in the waveform.

For the purpose of this discussion, assume the FFE algorithm you are using has three taps. Taps are unitless correction factors applied to voltage levels in order to correct them. One way to think of these correction factors is to view them as the ratio of the voltage the receiver should have seen to the voltage the receiver did see.

The mathematical description of a three tap FFE is as follows:

e(t) = c0r(t – (0TD)) + c1r(t – (1TD)) + c2r(t – (2TD))

where:

• e(t) is the corrected (or equalized) voltage waveform at time t.

• TD is the tap delay.

• r(t-nTD) is the uncorrected input waveform n tap delays before the present time.

• cn is the correction coefficient (tap) multiplied by the version of the uncorrected

waveform that has been time-advanced by n tap delays.

So FFE obtains the corrected (or equalized) voltage level at the location of interest on the waveform (time t) by forming a sum of the taps and voltage levels of the previous two tap-delayed locations as well as the location of interest before being equalized. Once the location of interest’s voltage level has been corrected, the algorithm moves along with the sample rate to the next location of interest and repeats the process. This continues until the entire waveform has been traversed.



DECISION FEEDBACK



There are multiple ways to implement DFE. This section will discuss the DFE algorithm used in the Agilent Infiniium 90000A Series oscilloscope.

For the purpose of this article, assume the DFE algorithm you are using has two taps. Before looking at the mathematical description of DFE, it is important to understand the results of the algorithm. Generally, DFE calculates a correction value that is added to the logical decision threshold (the threshold above which the waveform is considered a logical high and below which the waveform is considered a logical low). Therefore, DFE results in the threshold shifting up or down so new logical decisions can be made on the waveform based upon this new equalized threshold level.

The mathematical description of the correction value added to the decision threshold for a two tap DFE is as follows:

V(k) = c1s(k – 1) + c2(k – 2)

where:

• V(k) is the correction voltage added to the decision threshold used when determining the

logical value of bit k.

• s(k-n) is the logic value of the data bit located n bits prior to bit k.

• cn is the correction coefficient (tap) for the bit n bits prior to the bit of interest.

So, in order for DFE to obtain the corrected voltage offset for the threshold level at the bit of interest, it first needs to be seeded with the correct bit values for the first several bits to get started. Assuming the logical decisions for the first several bits are correct, the algorithm can feed them forward to determine the logical value of the current bit.

For a two tap DFE, the two bits previous to the current bit need to have their bit levels already determined. Then the algorithm multiplies their bit levels by their corresponding tap values. The sum of these two tap/bit level products gives the amount the decision threshold should be shifted.

Many DFE algorithms would then shift the voltage threshold by this amount, but the Infiniium 90000A Series oscilloscope does the opposite. Instead of shifting the voltage threshold, it keeps the threshold constant and shifts the corresponding voltage level by the same amount, but in the opposite direction. The algorithm would then shift forward one index to the next bit of interest. This process repeats itself until the entire signal has been traversed.



FFE VS. DFE



FFE is the most common equalization algorithm used in today’s serial busses. As explained, FFE only corrects voltage level by removing ISI, so the equalizer chips tend to not be as complicated and require less gates than a chip designed using DFE. Under most circumstances, the less expensive and easier to implement FFE will work for designers.

Now consider a design where the channel has the potential to vary from chip to chip. DFE is typically used to open the eyes in signals with more ISI than FFE can handle. Because DFE uses the current bit as part of it tap value definition it is able to dynamically open closed eyes.

Today’s oscilloscope software can be used to model both DFE and FFE to find which algorithm suits the designers needs best. For example Agilent’s Infiniium Serial Data Equalization Software (N5461A) is able to model both on a single screen to allow users to choose which equalizer they want to implement. While DFE and FFE are different equalization techniques, it is not uncommon to use both at the receiver.



CONCLUSION



Today’s oscilloscopes now provide equalization software that will fully model both DFE and FFE techniques. Having an oscilloscope that can quickly model equalization techniques saves design cycles and increases a chip’s time-to-market, which in turn increases revenue. Maybe the biggest advantage of using an oscilloscope to model equalization is the idea that the oscilloscope is using the actual signal to model the equalization.

In addition to modeling the exact signal, oscilloscopes also provide real-time updates of the most advanced equalization variables. Using today’s oscilloscope software, it is possible to quickly change tap values (correction factors) to see how various tap values affect the eye. It is important to note that equalization removes ISI from a lossy channel, but is unable to remove any noise in a system.

As a result, in addition to purchasing an oscilloscope that is able to model equalization, designers must also look at purchasing oscilloscopes with very low noise floors so as to avoid having the oscilloscope noise amplified and unnecessarily influencing the equalized signal. Equalization is becoming increasingly important to today’s high-speed digital designs as designers continually push material limits for increasing bus speeds.



About the authors



Robert Lashlee is the learning products engineer for the high performance oscilloscopes/probes at Agilent Technologies. He received his M.S. in Physics from the University of Georgia (The Center for Simulational Physics) and his B.S. in physics from the University of Central Missouri.

Click here for the illustrations:

Figure 1, Figure 2

 

 
 
 

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