The growing requirement for cheaper, smaller, faster, portable and multi-featured electronic consumer devices/products has augmented the demand for flip-chip (FC) technology in high-density packaging. With shrinking device sizes, the increase in electrical current and thermal energy density becomes inevitable. Very often, existing IC packages could not effectively manage electrical current and thermal energy density, thus hampering product reliability and features. Because of this miniaturization, the I/O pads on ICs become smaller and closer (smaller pitch) to each other.
This brings about another challenge in using existing FC packaging technology with solder balls. Solder balls would link two separate adjacent I/O pads together when the pitch becomes too small. In the foreseeable future, device miniaturization using conventional (solder ball) FC packaging solution may lead to: (1) serious electromigration reliability problems in FC interconnects, resulted from higher electrical current density; (2) heat trap or thermal runaway, due to the thermal dissipation capability of current IC packages; and (3) more I/O pads per silicon device, thus closer bumps to adjacent bumps.
Many problems that surfaced with miniaturization, including that of assembly processes, can be minimized with the implementation of copper pillar (Cu-pillar) bump into existing IC packages. Cu-pillar bump, which is shown in Figure 1, comprises of two segments–a copper base and a solder tip. It has superior electrical and thermal characteristics over the conventional solder ball, and it can take form of flexible shapes to resolve the problems that come with increased electrical current and thermal energy density. An emerging FC packaging technology using Cu-pillar bumps to replace solder ball bumps is expected to minimize, if not eliminate, some of these problems. Figure 2 illustrates the implementation of the Cu pillar in one of the FC packaging technologies--quad flat no-lead (QFN) package.
Capacity advantage
The move to FC packaging technology is inevitable because of the increasing demand for miniaturization. Existing FC packaging technologies using solder ball for interconnect suffer reliability issues dominated by electromigration, which is worsen by the demand for higher electrical current density.
The electromigration voids created near silicon (Figure 3) are due to the electrons’ direction flow and the high-density electrical current at the failure locality. With the same amount of electric current passing through the Cupillar bump, a longer time would be required to form such electromigration voids. The electromigration voids at the Cupillar bump were created near the device metal trace—away from the current crowding region. The electrical current density at the current crowding region could be 10 times higher than that of the bump average, as noted by some studies.
Assembly processes
Fine-pitch FC packaging With pad pitch getting smaller, conventional FC packaging would face solder ball bridging challenges as illustrated in Figure 5 (a). To avoid bridging, smaller solder balls could be used as shown in Figure 5 (c). However, using smaller solder balls results in low standoff flip-chip assembly, which is critical to reliability and underfill process. Cu-pillar bumps could resolve the fine-pitch issue because they consist of a nonreflowable copper segment to maintain a higher standoff during flip-chip assembly. Higher standoff assembly facilitates the capillary and/or the direct mould underfilling process, thus minimizing voids.
No solder-paste printing
High-lead solder ball, which has a high melting temperature, is utilized in the FC packaging to prevent standoff collapse during flip-chip. However, utilization of high-lead solder ball would require the challenging solderpaste printing process for interconnecting to the leadframe. The reflowable solder tip on the Cu-pillar structure enables the interconnection without additional solder paste printing process.

Controlled solder spreading
The solder ball reflowable characteristic requires selective surface finishing on leadframe to prevent solder overflow or overspreading, which results in standoff flip-chip assembly to collapse. For Cu-pillar bump in the FC assembly, the leadframe does not require selective surface finishing to avoid overspreading because the amount of solder tip is controlled. Figure 6 (a) shows that the solder spreading of the Cu-pillar bump is controlled.

The controlled solder spreading characteristic enables the use of non-selective solder mask substrate, as illustrated in Figure 6 (b), whose solder mask opening is large and not selective to individual pads. The solder mask selective openings, which are not required for Cu-pillar bump technology, are mainly used to control the solder spreading of solder balls in the substrate technology. The mask openings of the substrate are often the limiting factor for fine-pitch pads substrate. Together with the Cu-pillar bump technology, FC assembly onto substrate is possible for fine-pitch devices like DRAM chips. Furthermore, non-selective mask opening would simplify the substrate fabrication process and allow cost-savings.


Consistent assembly
During the conventional FC assembly process, solder balls reflowed to inconsistent structures as shown in Figure 7. The inconsistent structure would lead to inconsistent space between different bumps even with careful design of the bump layout. The different gaps encourage underfill materials to fill the larger gaps, thus avoiding the smaller gaps. This leads to having voids in the final package or assembly, which later becomes a reliability issue. Cupillar bump minimizes the inconsistent space among the bumps due to its non-reflowable copper segment, as clearly shown in Figure 6 (a). Hence, reliability is improved.
Conclusion
It is likely that conventional FC packaging technology would no longer meet the demand for further miniaturized packaged product. The Cu-pillar technology incorporated into FC packaging not only meets the demand for product miniaturization, it also improves product features. Furthermore, this technology could simplify various assembly processes, thus increasing productivity and cost-savings.

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